In multilayer printed circuit boards, integrated circuit packages, and integrated circuits on dies, there are many situations in which signals need to switch from layer to layer. FIG. 1 and FIG. 3 show two situations of signal switching. From FIG. 1, a signal trace 2 on the top layer switches to the signal trace 9 on the bottom layer through the signal via 3. The signal propagating along via 3 will pass through the two metal planes 7 and 8, which can be either a power plane or ground plane. When the signal propagates through via 3, it will generate an electromagnetic (EM) wave. The EM wave will propagate between the two metal planes 7 and 8, causing voltage fluctuations that will degrade the signal integrity. Also, the impedance of the signal propagating in a trace will be different from that of the signal propagating in a via. This is the so-called impedance discontinuity.
This impedance discontinuity will affect the signal quality as well. The dashed lines of FIGS. 5 and 7 show the simulated insertion loss (S21) of the signal path indicated in FIG. 1 for the PCB board-level via and the IC packaging-level via, respectively. A smaller insertion loss value indicates that there is more energy dissipated along the signal path. These energy losses could be due to EM radiation, impedance discontinuity, dielectric loss, and so on.
From FIG. 3, a signal propagating along trace 23 on the third layer switches to a signal propagating along trace 30 on the fifth layer through the signal via 24. The signals on traces 23 and 30 will be referenced to the metal planes 28 and 29, respectively. The metal planes 28 and 29 can be power planes or ground planes. When the signal propagates along the signal via 24, it will also generate an EM wave. The EM wave will propagate between the two metal planes 28 and 29 and will cause voltage fluctuations that will degrade the signal integrity.
Again, the impedance along the signal trace will be different from that along the signal via. This impedance discontinuity will also affect the signal quality. The dashed lines of FIG. 6 and FIG. 8 show the simulated insertion loss (S21) associated with the signal path indicated in FIG. 3 for the PCB board-level via and the IC packaging-level via, respectively. Again, the smaller insertion Joss values indicate that there is more energy dissipated along the signal path. These energy losses could be due to EM radiation, impedance discontinuity, dielectric loss, and so on.